Exam 1: Thursday, March 1st 2018, 11am-12:20pm, In Class
Exam 2: Tuesday, April 10th 2018, 11am-12:20pm, In Class
Final Exam: Tuesday, May 8th 2018, 8am-11am, ECEB 3081
Hachtel and Somenzi, Logic Synthesis and Verification Algorithms
Text Book from SpringerLink (needs NetID and Password)
E. J. McCluskey, Logic Design Principles
Randy H. Katz, Contemporary Logic Design
Weste and Eshraighan, Principles of CMOS VLSI Design
Giovanni De Micheli, Synthesis and Optimization of Digital Circuits
Srinivas Devadas, Logic Synthesis