Project
| # | Title | Team Members | TA | Documents | Sponsor |
|---|---|---|---|---|---|
| 11 | Digitally-Controlled Isolated DC-DC Converter for Automotive Applications |
Curtis Lam Jayden Dang Mark Sorial |
Lukas Dumasius | design_document1.pdf proposal1.pdf |
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| # Digitally-Controlled Isolated DC-DC Converter for Automotive Applications **Team Members:** - Curtis Lam (cjlam2) - Mark Sorial (msorial2) - Jayden Dang (jtdang2) ## Problem Automotive 48V-100V mild-hybrid architectures need to step down to the 12V rail that powers legacy electronics, while maintaining galvanic isolation between the two domains for safety and noise immunity. Existing solutions often rely on analog control loops that are inflexible, hard to tune, and lack the telemetry/fault reporting needed for modern automotive diagnostics (e.g., CAN-reportable fault codes). We propose a digitally controlled isolated DC-DC converter using a half-bridge topology, demonstrating a control and magnetics design approach that scales toward higher-voltage (e.g., 400V-to-48V-class) automotive systems, implemented and validated at a reduced-voltage scale (48V-to-12V) for lab safety. ## Solution We will design and build an isolated DC-DC converter using a half-bridge topology, chosen for its efficient transformer utilization and straightforward scaling path to higher input voltages via component re-rating and turns-ratio adjustment. All primary-side switching, closed-loop voltage/current regulation, and protection logic will be implemented digitally on a microcontroller, with no analog compensator ICs, so the control firmware is the portable, scalable part of the design. Rectification on the secondary side will be Schottky diodes for bring-up, with MCU-timed synchronous rectification planned as a stretch goal. A central focus of the project is the transformer design itself: core selection, turns ratio, winding construction, and leakage inductance management for a half-bridge-driven isolated converter. The prototype will target a DC-DC conversion of 48V to 12V at 100W. The design breaks down into five subsystems: digital control, sensing, the isolation barrier and isolated power, the power stage, and telemetry. ## Solution Components ### STM Digital Control An STM32H743 (480MHz Cortex-M7) runs the whole converter, chosen for its timer and ADC peripherals plus prior experience with the chip. Its high-resolution timer (HRTIM) clocks at 480MHz. The 16-bit ADCs run at 12-bit for speed (6.25Msps), sampling Vout and Iout simultaneously on an HRTIM trigger. The STM32H743 also has 2x native FDCAN peripherals for fulfilling our CAN Telemetry requirements. **Part numbers (subject to change):** - STM32H743 ### DC/DC Sensing Based on our control algorithm, we will need to sense different parts of the input and output of the power converter, namely Vout and Iout. We will use shunt resistors and current sense amplifiers along with the ADCs on the STM32 to provide analog data at the bandwidth we need for our control algorithm. Input voltage is measured across the isolation barrier with an isolated amplifier so the controller can enforce undervoltage lockout and report Vin over telemetry. We will also add both hardware and software fault detection to prevent any issues while debugging. **Part numbers (subject to change):** - Current sense amplifier: TI INA185 - Isolated input voltage sense: TI AMC1311 - Board temperature: TI TMP61 thermistors at the transformer and MOSFETs ### Isolation Barrier/Power The isolation barrier provides safety and noise rejection between the "high" voltage side and the low voltage side. In automotive applications, these two power domains must always be galvanically isolated, so a fault on the high-voltage bus can never reach the 12V electronics. Only four paths cross the barrier in our design: the main transformer, the gate-drive signals, the input voltage sense, and the isolated bias power. That bias supply provides the logic rails for our detection and gate-drive circuitry before the main output exists. On the PCB, the two domains get separate ground planes with a copper keepout strip between them, and we will verify barrier integrity with a resistance test at bring-up. **Part numbers (subject to change):** - Isolated gate driver: TI UCC21520DW - Gate-drive bias: Murata MGJ2D051505SC - Startup logic bias: RECOM REC3.5-4805SRW/R ### Power Stage The power stage chops the input bus into an alternating square wave across the transformer primary using a half-bridge switching cell, transferring power magnetically to the "low voltage" side, where it is rectified and filtered back to DC. The transformer is a custom design and one of the main deliverables of the project: core material and size, turns ratio, winding construction, and leakage inductance all have to be worked out together. The turns ratio in particular has to hold regulation across the full 20V-60V input range, which sets the usable duty cycle window and drives the rest of the magnetics design. **Part numbers (subject to change):** - Half-bridge MOSFETs: TI CSD19532Q5B (100V) - Transformer core: TDK N49 or Ferroxcube 3F36 ferrite, ETD29 or PQ26/25 size, wound in-house with litz wire - Rectifiers: ON Semi MBR20100CT Schottky (baseline); TI CSD18540Q5B sync FETs if we reach the synchronous rectification stretch goal - Output filter: ~3.3uH inductor (Coilcraft SER2915H class) plus polymer/ceramic capacitor bank ### Telemetry The converter should act as a modern automotive ECU with a CAN-FD interface running at 1Mbps arbitration rate and 4Mbps data rate. This provides enough bandwidth to telemeter statistics about the converter, control algorithm internals, housekeeping monitoring, and faults. Messages include a periodic heartbeat with the converter state machine state, measurement frames (Vin, Vout, Iout, power, temperatures), and event-driven fault frames that report which protection tripped and the value at the moment of the trip. We will publish a DBC file for the message set and interface with the bus from a host PC with an OTS CAN Viewer, so no custom decode software is needed to verify the telemetry. **Part numbers (subject to change):** - CAN transceiver: TI TCAN1042HGV (CAN FD to 5Mbps) - Host interface: Canable 2.0 Serial Adapter ## Criterion For Success ### High-level goals - Regulated 12V average output, within ±5%, across the full load range - Operation across a 20V - 60V input range - 90% efficiency at 50W, 48V input, measured with calibrated instruments - Output ripple below 5% peak-to-peak at full load - 100W continuous output at thermal steady state (below 60°C) - 100Hz CAN telemetry, decodable in a CAN Viewer with our published DBC ### Stretch goals - 250W output - Ripple below 1% - Synchronous rectification, with a measured efficiency improvement over the Schottky baseline - Standalone telemetry viewer application - Variable output voltage, commanded over CAN ### Testing/Demo The board will have test points along the power path plus the gate drives and logic rails. We will test with a current-limited bench supply on the input, an electronic load on the output, and an oscilloscope with differential probes for anything on the primary side. We will also use the CAN telemetry itself for validation by comparing reported Vin, Vout, and Iout against the bench instruments. For the demo, the converter powers the e-load with live telemetry in a CAN Viewer, we sweep the input and step the load to show regulation on the scope, and force an overcurrent to show the hardware shutdown and fault reporting over CAN. |
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